The present invention relates to a high speed analog-to-digital converter .Iadd.and to a method for analog-to-digital conversion. .Iaddend.
Recent developments in the field of digital .[.techniques for the.]. .Iadd.signal .Iaddend.processing .[.of signals.]. have increased interest .[.for.]. .Iadd.in .Iaddend.high speed conversion.
In particular.Iadd., .Iaddend.the processing of signals in the video band creates the need of converters with a .[.band width.]. .Iadd.bandwidth of .Iaddend.10-50 Mhz and dynamic range .[.field.]. .Iadd.range .Iaddend.of 8 bits.
An integrated approach for a digitization system requires the implementation, inside the conversion device itself, of several preprocessing functions.
In .[.such sector.]. .Iadd.this art, .Iaddend.the use is known of flash (or instantaneous) converters having one or two steps. In particular.Iadd., .Iaddend.a single-step flash converter allows the use of conversion speeds of 120 Ms/sec (Megasamples per second) with bipolar technology and of 20 Ms/sec with CMOS technology. This approach does, however, have some drawbacks in terms of dissipated power, silicon area, .Iadd.and .Iaddend.high capacitative load at input.
Such drawbacks are overcome in part by using flash converters having two conversion steps. In this case the conversion operation provides for a first step of rough conversion of the sampled input signal, whereby there are obtained the four most significant bits of the signal at output, and a second step which receives at input a signal equal to the difference between the sampled input signal and the output signal of the first conversion step, reconverted to analog, and .[.operates.]. .Iadd.performs .Iaddend.a fine conversion completing the digital output signal with the four least significant bits.
The use of such two-step conversion devices unfortunately requires conversion times which are longer with respect to the use of single-step converters. It is in fact necessary to execute two successive flash conversions, .[.reconvert to analog.]. .Iadd.including reconverting .Iaddend.the result of the first conversion operation .Iadd.to analog .Iaddend.and .[.execute.]. .Iadd.executing .Iaddend.a subtraction before the second fine conversion step.
The object of the present invention is thus to accomplish an analog-to-digital converter with a very high conversion speed .[.,.]. (.Iadd.e.g. .Iaddend.around 50 Ms/sec in .[.the.]. CMOS technology).Iadd., .Iaddend.which has low input capacitance, low power dissipation.Iadd., .Iaddend.and .[.optimization.]. .Iadd.optimal use .Iaddend.of .[.the.]. silicon area .[.used.]..
According to .Iadd.an illustrated embodiment of .Iaddend.the invention.Iadd.,.Iaddend.such object is accomplished by means of a converter, characterized in that it comprises a plurality of comparison cells which in successive steps determine the four most significant bits of the conversion and then the four least significant bits after the more significant bits have been reconverted to analog and .[.their subsequent subtraction.]. .Iadd.then subtracted .Iaddend.from the input signal.
In particular.Iadd., .Iaddend.each of said comparison cells is constituted by a comparator with the input connected to an intermediate branch point between two condensers in series, .Iadd.the first .Iaddend.one of which is supplied in a first step with an input signal, in a second step with a first reference voltage different for each cell.Iadd., .Iaddend.and in a third step with a selected reference voltage equal to that of said first reference voltages which approximates said input signal .[.downwards.]. .Iadd.from below .Iaddend.with the highest accuracy, .[.and by a .]. .Iadd.with the .Iaddend.second condenser .[.which is.]. .Iadd.being .Iaddend.grounded during said first and second steps, .[.while.]. .Iadd.and connected, .Iaddend.during the third step .[.it is connected.]. .Iadd., .Iaddend.to one .[.respective.]. of a plurality of second reference voltages .Iadd.which are .Iaddend.submultiples of said first reference voltage .Iadd.(e.g. Vr'=Vr/16).Iaddend..
In this way the result is obtained that a single group of comparators accomplishes both analog-to-digital conversion operations, .Iadd.as well as .Iaddend.the operation of intermediate digital-to-analog reconversion of the output signal from the first step of analog-to-digital conversion and .[.that.]. .Iadd.the operation .Iaddend.of subtraction of .[.said signal.]. .Iadd.the .Iaddend.reconverted .[.to.]. analog .Iadd.signal .Iaddend.from the input signal, which in normal two-step flash converters are accomplished by two groups of comparators with a digital-to-analog converter and subtractor connected in between. There follow .[.favourable.]. .Iadd.favorable .Iaddend.results especially in terms of the speed of conversion, of the use of the silicon area and of power dissipation.
These and other features of the present invention shall be made evident by the following detailed description of an embodiment illustrated as an example in the enclosed .[.drawing.]. .Iadd.drawings..Iaddend.